Objectives

POLYSYS is developing photonic and electronic components for direct operation at 100 Gb/s. Their development relies on  ultra-fast electro-optic polymer modulators on the transmitter side and InP receivers. These components will be integrated to form 100 Gb/s arrayed modules and demonstrate a total record of 400 Gb/s data interconnection. The specific objectives of the project include:

 

1) Monolithic integration of arrayed EO modulators and passive photonic components on the polymer platform

POLYSYS is aiming at creating a monolithic integration platform based on the electro-optic polymer material system. This will enable a single fabrication process of optical modulator arrays and appropriate passive components on the same low-cost, multi-functional board. The passive components to be fabricated include straight and bent monomode waveguides, a multi-mode interference (MMI) coupler and a Bragg grating band-stop filter.

2) Development of efficient III-V-to-polymer integration processes

A major objective of POLYSYS is the hybrid integration of InP-based active components (DFB lasers, gain chips) and photodetectors with the EO polymer platform. Hybrid integration will be realized using the butt-coupling technique. This approach will allow for a real yield management in the manufacturing and assembling process of the components enabling the development of planar optical devices of higher functionalities at substantially lower costs.
Based on this technique POLYSYS will integrate for the first time active components with polymer modulators allowing for integrated transmitter modules with the highest potential for high-speed operation. POLYSYS aims at collimator-free coupling of DFB lasers or gain chips to the polymer platform forming the 100 Gb/s, the 4x100 Gb/s and the tunable 100 Gb/s transmitter modules.

3) Monolithic integration of 4x100 Gb/s InP-based photoreceivers

POLYSYS will develop for the first time arrays of 100 Gb/s InP photodiode and photoreceiver chips as line matrices. The arrayed approach will challenge yield demands for the uniformity and stability of process technology. POLYSYS will develop two generations of receivers: the first generation will comprise waveguide-integrated pin photodiode arrays with bandwidth in excess of 100 GHz, 0.6 A/W responsivity and polarization dependent loss (PDL) lower than 0.3 dB. The second generation of POLYSYS arrayed receivers will comprise additional built-in post-amplification gain by monolithic pinTWA integration, employing travelling-wave amplifier (TWA) technologies. The addition of the TWA circuits will increase the available conversion gain from 15 V/W for the pin photodiode solution into the 40-70 V/W range, while still preserving the opto-electronic bandwidth higher than 95 GHz.

4) Monolithic integration of arrayed 100 Gb/s VHSICs based on InP-DHBT technology

POLYSYS will develop 100 Gb/s mixed-signal very high speed integrated circuits (VHSICs) for the 100 Gb/s and 4x100 Gb/s transmitter and receiver modules, including single and arrayed 2:1 MUX driving circuits for the optical modulators, single and arrayed 1:2 DEMUX circuits and 100 Gb/s clock and data recovery circuit for the receiver. Design and fabrication will be based on advanced 0.7 µm InP-double heterojunction bipolar transistor (InP-DHBT) technology.

The development of the circuits will target at improving their thermal resistance and reducing the power consumption in order to allow for their arrayed approach.

5) System integration and packaging of arrayed transmitter and receiver modules

POLYSYS will develop a co-design methodology for the basic photonic, electronic and optoelectronic subsystems of the targeted modules in order to ensure their compatibility, as well as their physical and functional integration and packaging. The co-design process includes considerations on the optical waveguide dimensions, properties and spot sizes in the different components,  the electrical properties of the basic components and the footprint of the subsystems for efficient alignment of the optical elements and design of short high-speed wire bondings.